MIB Viewer

frEndPtchanFECNconfig

OBJECT-TYPE
1.3.6.1.4.1.351.3.4.1.32
Access
read-write
Status
mandatory
Sub-identifiers
0
The FECN bits in frame-relay are mapped to EFCI bit in the ATM cells. mapEFCI is valid only for SIW. This is only valid for frEndPtType of 'frsm'. Another restriction is that the other endpt should be an ASI(atmEndPtTable) endpt. If the other endpt is a FR endpt the DEFVAL will over-write the user's input.
INTEGER { mapEFCI(1), setEFCIzero(2) }